‘Time-Triggered Reference Designs’ (TTRDs)


Our public ‘Time-Triggered Reference Designs’ (TTRDs) can be downloaded from this page.

Used in conjunction with the ‘ERES2‘ book, our public TTRDs are designed to illustrate ways in which TT software architectures can be used to support the development of a wide range of embedded systems for which safety is a key design consideration.

Technology licence

The public TTRDs downloaded from this website may be used without charge: [i] by universities and colleges in courses for which a degree up to and including “MSc” level (or equivalent) is awarded; [ii] in non-commercial projects carried out by individuals and hobbyists.

Use of these TTRDs in any form of commercial project (including training courses) or in university research projects (including PhD-level programmes and equivalent) requires purchase of a ReliabiliTTy® Technology Licence.

Please contact us if you have any questions about these licence arrangements.

[This page was last updated: 2017-08-25]

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TTRD2-02a [STM32-F091 target, Keil uVision project]

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Latest version is ttrd2-02a-t0091a-v001c (zip file) [Release 2017-02-24a].

This TTRD targets an STM32F091RC MCU. It is designed to run on Nucleo-F091RC board. No external crystal assumed.

TTRD2-02a implements a simple ‘TTC’ scheduler design.

See ‘ERES2‘ Chapter 2 for details.

Reviewing TTRD2-02a is a good way to begin exploring TT designs. This introductory design is documented in the sample chapters for the ERES2 book: these can be downloaded (free of charge) from the ERES2 page.

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TTRD2-02a [STM32-F405 target (DuplicaTTor board), Keil uVision project]

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Latest version is ttrd2-02a-t0405a-v001a (zip file) [Release 2017-08-18a].

This version of TTRD2-02a targets an STM32F405 MCU. It is intended for use with a DuplicaTTor board.

Please see section above for further information about this TTRD.

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TTRD2-03a [STM32-F401 target, Keil uVision project]

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Latest version is ttrd2-03a-t0401a-v001a (zip file) [Release 2017-02-24a].

This TTRD targets an STM32F401RE MCU. It is designed to run on a Nucleo-F401RE board. An external 16 MHz xtal is assumed to be present.

TTRD2-03a implements a simple TTC demo system with UART (Buffered Output) library.

Please see ‘ERES2‘ Chapter 3 for further information.

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TTRD2-03a [XMC4500 target, Keil uVision project]

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Latest version is ttrd2-03a-t4500a-v001c (zip file) [Release 2017-02-24a].

This TTRD targets an Infineon XMC4500 MCU. It is designed to run on a Relax Lite board.

NOTE: If you have v1 of the Relax Lite board, an FTDI interface (or similar) needs to be connected to Port 0, Pin 5 in order to see the UART outputs (because the ‘VCOM’ interface is not operational on this version of the board).

Please see section above for further information about this TTRD.

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TTRD2-04a [STM32-F401 target, Keil uVision project]

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Latest version is ttrd2-04a-t0401a-v001a (zip file) [Release 2017-08-21a].

This TTRD targets an STM32F401RE MCU. It is designed to run on a Nucleo-F401RE board. An external 16 MHz xtal is assumed to be present.

TTRD2-04a illustrates the use of Duplicated Variables.

Please see ‘ERES2‘ Chapter 4 for further information.

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TTRD2-05a [STM32-F401 target, Keil uVision project]

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Latest version is ttrd2-05a-t0401a-v001a (zip file) [Release 2017-08-21a].

This TTRD targets an STM32F401RE MCU. It is designed to run on a Nucleo-F401RE board. An external 16 MHz xtal is assumed to be present.

TTRD2-05a illustrates the use of register configuration checks.

Please see ‘ERES2‘ Chapter 5 for further information.

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TTRD2-06a [STM32-F405 target (DuplicaTTor board), Keil uVision project]

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Latest version is ttrd2-06a-t0405a-v001a (zip file) [Release 2017-08-18a].

This version of TTRD2-06a targets an STM32F405 MCU. It is intended for use with a DuplicaTTor board.

TTRD2-06a illustrates the use of Backup Tasks.

In the demo, two ‘Heartbeat’ tasks are implemented.

When ‘Heartbeat 1’ fails, ‘Heartbeat 2’ takes over. When ‘Heartbeat 2’ fails, the systems enters a fail-safe state.

The example is very simple, but the underlying architecture can be widely applied.

See ‘ERES2‘ Chapter 6 for details.

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TTRD2-08a [STM32-F401 target, Keil uVision project]

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Latest version is ttrd2-08a-t0401a-v001a (zip file) [Release 2017-08-21a].

This TTRD targets an STM32F401RE MCU. It is designed to run on a Nucleo-F401RE board. An external 16 MHz xtal is assumed to be present.

TTRD2-08a illustrates the use of reset-based Mode changes.

Please see ‘ERES2‘ Chapter 8 for further information.

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TTRD2-08b [STM32-F401 target, Keil uVision project]

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Latest version is ttrd2-08b-t0401a-v001a (zip file) [Release 2017-08-22a].

This TTRD targets an STM32F401RE MCU. It is designed to run on a Nucleo-F401RE board. An external 16 MHz xtal is assumed to be present.

TTRD2-08b illustrates techniques for changing Mode in the event that an Abnormal Processor State is detected at run time.

Please see ‘ERES2‘ Chapter 8 for further information.

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TTRD2-08c [STM32-F401 target, Keil uVision project]

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Latest version is ttrd2-08c-t0401a-v001a (zip file) [Release 2017-08-22a].

This TTRD targets an STM32F401RE MCU. It is designed to run on a Nucleo-F401RE board. An external 16 MHz xtal is assumed to be present.

TTRD2-08c illustrates techniques for changing Mode in the event that an Abnormal Processor State is detected at run time. The focus of the example is on the use of Same-Mode Resets.

Please see ‘ERES2‘ Chapter 8 for further information.

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TTRD2-08d [STM32-F401 target, Keil uVision project]

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Further information will be available shortly.
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TTRD2-08e [STM32-F405 target (DuplicaTTor board), Keil uVision project]

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Latest version is ttrd2-08e-t0405a-v001a (zip file) [Release 2017-08-25a].

This version of TTRD2-08e targets an STM32F405 MCU. It is intended for use with a DuplicaTTor board.

TTRD2-08e illustrates the use of Sub-Modes.

See ‘ERES2‘ Chapter 8 for details.

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TTRD2-09a [TMS570 target, TI CCS project]

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Further information will be available shortly.
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TTRD2-16a [STM32-F401 target, Keil uVision project]

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This example is now incorporated in TTRD2-19a.
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TTRD2-17a [STM32-F405 target, Keil uVision project]

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This example illustrates the use of an eWDC.

Further information will be available shortly.
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TTRD2-18a [STM32-F401 target, Keil uVision project]

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This example is now incorporated in TTRD2-19a.
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TTRD2-19a [STM32-F401 target, Keil uVision project]

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Latest version is ttrd2-19a-t0401a-v001c (zip file) [Release 2017-08-17a].

This TTRD targets an STM32F401RE MCU. It is designed to run on a Nucleo-F401RE board. An external 16 MHz xtal is assumed to be present.

TTRD2-19a implements a complete ‘CorrelaTTor-A’ platform. This includes a TTC scheduler plus iWDT, MoniTTor and PredicTTor mechanisms.

Please note that TTRD2-19a uses task timing data that were created using TTRD2-a07a (see below).

Please note that TTRD2-19a also uses task-sequence data that were created using TTRD2-a08a (see below).

Optionally, TTRD2-19a performs system resets every few seconds. The reset process involves repeating all of the core ‘Power On Self Tests (POSTs). Before performing the reset, part of the Processor state is stored: the state is recovered after the tests and the system continues.

Please see ‘ERES2’ Chapter 19 and Appendix 3 for further information about this TTRD.

TTRD2-19a demonstrates a very popular TT software platform (‘CorrelaTTor’). Using an appropriate MCU and with the addition of a small external ‘watchdog’ device (eWDC), a CorrelaTTor platform can – for example – form the basis of an ‘ASIL D’ design (in compliance with ISO 26262).

We discuss this seminal TTRD on our Taster Days and during our TTb training course.

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TTRD2-20a [TMS570 target, TI CCS project]

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Further information will be available shortly.
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TTRD2-22a [XMC4500 target, Keil uVision project]

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Further information will be available shortly.
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TTRD2-23a [LPC1769 target, Keil uVision project]

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Further information will be available shortly.
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TTRD2-a07a [STM32-F401 target, Keil uVision project]

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Latest version is ttrd2-a07a-t0401a-v001a (zip file) [Release 2017-03-06a].

This TTRD targets an STM32F401RE MCU. It is designed to run on a Nucleo-F401RE board. An external 16 MHz xtal is assumed to be present.

Please see ‘ERES2‘ Appx 07a and Chapter 19 for further information.

TTRD2-a07a is a key example for many TT development teams. This TTRD implements an ‘instrumented’ scheduler (based on TTRD2-19a in this example, but it can be adapted to any design). The example supports measurement of task execution-time (‘WCET’ and ‘BCET’) as well as measurements of ‘tick jitter’.

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TTRD2-a08a [STM32-F401 target, Keil uVision project]

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Latest version is ttrd2-a08a-t0401a-v001a (zip file) [Release 2017-03-06a].

This TTRD targets an STM32F401RE MCU. It is designed to run on a Nucleo-F401RE board. An external 16 MHz xtal is assumed to be present.

Please see ‘ERES2‘ Appendix 8 for further information.

TTRD2-a08a is another key example for TT development teams. This TTRD implements a ‘Dry Scheduler’: this type of project is used to generate ‘Tick Lists’. For example, the configuration presented here can be used to generate the Tick List that is employed by the PredicTTor mechanism in TTRD2-19a.

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TTRD2-a09x [LPC1769 target, Keil uVision project]

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Further information will be available shortly.
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TTRD2-a10x [LPC1769 target, Keil uVision project]

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Further information will be available shortly.
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Are the TTRDs from ‘ERES1’ still available?

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You can download the latest (and final) TTRDs from ‘ERES1’ here (zipped file).
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